Dear Marc,
Are there any constraints on what underlying hardware platform SMP Gambit can work on, e.g. architectures with strong memory ordering (AMD64) versus architectures with weak memory ordering (ARM64)?
Does Gambit export any memory barrier primitive?
Do any particular Gambit primitives imply a memory barrier, so these are abstracted away from the user?
E.g. (thread-send! t (list 1 2 3)) would imply a memory barrier on weakly ordered systems, if t is being executed on another OS thread, so that when the message is received on the other side, Gambit has automatically ensured that the structure is actually accessible on the receiving end?
(https://en.wikipedia.org/wiki/Memory_ordering#Runtime_memory_ordering)
Will appreciate a lot to understand how to manage this.
Thanks! Adam