I'm in the process of coding the register assignment for the DivInstr in
the backend and running into a slight issue. The way it's setup now, we
block some registers for the instruction, and give register hints for
the input and output arguments. However, there seems to be no way to
make those register hints mandatory (force the allocator to respect them).
On x86, idiv requires the dividend to be in EAX:EDX, and puts the
quotient in EAX. This means I need to block both registers. I also need
to block a third register to write the divisor into when the divisor is
an immediate integer. However, when I tested this with a non-constant
divisor, it ended up being assigned into EDX (a part of the dividend value).
This forces me to always reserve an extra scratch register to put the
divisor in, and check which register it ends up assigned to, in case it
ends up into the dividend registers. I also have to check that the
dividend is indeed in EAX, and move it there if it isn't. Also, I must
say I don't like the idea of having to reserve a *specific* scratch
register (seems inefficient if I don't care which one it is).
I would propose the following changes/additions to the current back-end
design:
1. A way to *force* specific operands into some specific registers
(strong register assignment constraint). This should work even if the
operands are immediate values.
2. A way to reserve some number of extra scratch registers, without
having to specify which ones.
- Maxime